Joris_VR
Index
About Joris_VR
Recent posts
TTL logic levels
Gasverbruik in de winter
Sorting binary records
Synchronizing threads in C and C++
Serial interface to the AVS-47
Random number generators in VHDL
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electronics
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LEON3
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misc
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software
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VHDL
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2016
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2013
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2011
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2010
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2008
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2007
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2006
(5)
Archives for VHDL
Random number generators in VHDL
2016-12-05
Computing 3n+1 with an FPGA
2010-02-08
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updated 2013-04-12
USB data transfer in VHDL
2007-04-19
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updated 2013-12-05
3n+1 iteration: FPGA vs CPU
2006-07-09
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updated 2010-03-31